1. Field of the Invention
The present invention relates to a semiconductor memory device and a writing method, for example, to a magnetic memory capable of recording data by supplying a current.
2. Description of the Related Art
In a semiconductor memory device such as a dynamic random access memory (DRAM) or static random access memory (SRAM), a memory cell array is formed by arranging memory cells as data storage units in a matrix. A bit line for selecting a column and a word line for selecting a row of the memory cell array select one memory cell corresponding to a specific address.
A decoder circuit converts an address signal into a selection signal for a specific bit line or word line. This selection signal controls a pass transistor connected between one end of the bit line or word line and a power supply circuit. On the basis of the control signal, the pass transistor, when on, electrically connects the two terminals and, when off, electrically disconnects them. Data is written to or read out from a memory cell by electrically connecting a bit line and word line to the power supply circuit.
A semiconductor memory device is fabricated by forming circuits and the like on a silicon wafer. The ratio occupied by the total area of memory cells in the area of the whole semiconductor memory device is called a cell occupation ratio. As this ratio increases, the cost performance improves, and the semiconductor memory device becomes more desirable. A one-chip memory cell array is divided into a plurality of memory cell arrays in order to reduce the influence of a parasitic capacitance and parasitic resistance on access. A decoder circuit is prepared for a plurality of divided memory cell arrays. If the number of divided memory cell arrays increases, the area of the decoder circuit also increases, and this decreases the cell occupation ratio.
A magnetic random access memory (MRAM) as one semiconductor memory device is expected in respect of non-volatility, high speed, high reliability, and large capacity. A memory cell of a typical MRAM comprises one magnetoresistive element and one selection transistor (U.S. Pat. No. 6,097,625). The magnetoresistive element comprises a magnetic free layer, a magnetic fixed layer, and a nonmagnetic layer sandwiched between them. Data is recorded by using the resistance state which changes in accordance with the direction of magnetization in the magnetic free layer.
Data is written to a memory cell by controlling magnetization of the magnetoresistive element by using a magnetic field generated by currents flowing through a write bit line and write word line which perpendicularly cross each other. The bit-line current is a bidirectional current in order to write data in a memory cell by controlling the direction of magnetization in the magnetic free layer by using a magnetic field in the direction of easy magnetization. The word-line current is a unidirectional current since it selects a memory cell by assisting to write data by a magnetic field in the direction of hard magnetization. A typical wiring configuration comprises write bit lines and write word lines as write lines, and read bit lines and read word lines as read lines (Jpn. Pat. Appln. KOKAI Publication No. 2002-170376).
The MRAM requires power supply circuits at the two ends of a memory cell array in order to drive write currents. In particular, pass transistors are required at the two ends of a bit line in order to drive the bidirectional current at high speed. Accordingly, decoder circuits are also required at the two ends of a memory cell array, and this decreases the cell occupation ratio.